ELEC 225, Fall 2009
Prof. Rich Kozick

Laboratory 2:
Thevenin Equivalent Circuit Models for Digital Logic Gates

Digital logic gates are the basic building blocks of digital systems such as computers, calculators, cell phones, and MP3 players. In this lab we will examine the 7400 series of logic chips. Recall that in ELEC 120 we used FPGAs to design and test our digital designs.

We will experiment with the 7400 chip which contains four NAND gates. Your first task is to verify the truth table for a NAND gate using PSpice and experimental measurements.

  INPUTS  OUTPUT
  Va  Vb   Yout

  0V  0V   ___
  0V  5V   ___
  5V  0V   ___
  5V  5V   ___
You should develop a strategy for determining the Thevenin equivalent circuit model. You may find it useful to use PSpice to help you determine a plan before you take experimental measurements.
  1. Be sure to check all four of the NAND gates on the chip.
  2. Determine the range of input voltages which are always accepted as "0"and "1" for your NAND gates using PSpice and experimental measurements.
  3. Check the input of a NAND gate in PSpice and experimentally. What is the voltage when nothing is connected to the input? (This is the open circuit voltage looking into the input.) Determine a Thevenin equivalent circuit for the input to the gate.
  4. Set the inputs to a NAND gate to 0 volts and determine the Thevenin equivalent model looking into the gate output. Compare the models you obtain using PSpice and experimental measurements.
  5. Set the inputs to a NAND gate to 4 volts and repeat the previous step.

Lab Report

Each lab group should determine a Thevenin equivalent circuit model for a NAND gate with inputs set to 0 V and 5 V. Show how you obtained the Thevenin model using PSpice and experimental measurements. Please submit a brief summary describing your group's approach and results before you leave the lab session.

Thank you and have fun!